1. Field of the Invention
The present invention relates to a charge coupled device, and more particularly, to a charge coupled device driven by a two-phase clock pulse applying to two-layer electrodes, which having a charge storage region and a charge barrier region which are self-aligningly formed in a charge transfer electrode.
2. Description of the Prior Art
In recent years, development is eagerly performed for an image capture device with a large number of pixels, and high portability such as a video camera for high definition TV and a digital still camera. Such image capture device requires development of a solid imaging device with low power consumption. To reduce power consumption, it is important to lower a drive voltage for a horizontal charge transfer section of an image capture device. It is because the horizontal charge transfer section is necessary to transfer signal charges at a high speed. Consequently, the horizontal charge transfer section usually employs two-layer electrodes supplied with a two-phase clock signal.
Such charge transfer device is described in IEDM Technical Digest, 1974, pp. 55-58, or Japanese Patent Application Laid-Open No. sho 62-71273.
FIGS. 3(a)-(g) sequentially shows sectional views in each manufacturing step of a charge coupled device with a conventional buried channel, two-phase driven two-layer electrode structure. Referring to FIGS. 3(a)-(g), the fabricating process is described for a conventional charge coupled device. First, an n-type silicon region 2 with impurity concentration of 1.times.10.sup.17 cm.sup.-3 and a depth of 0.5 .mu.m from the surface of a silicon substrate 1 is formed in a p-type monocrystalline silicon substrate 1 with impurity concentration of 1.times.10.sup.15 cm.sup.3. Subsequently, a first silicon oxide film 3 with a thickness of 100 nm on the surface of the n-type silicon region 2 is formed by a thermal oxidation technique (FIG.3(a)).
Then, a polycrystal silicon layer is formed in a thickness of 300 nm on an entire surface of the first silicon oxide film 3 with a low-pressure CVD (LPCVD) process, and patterned it to form a first conductive electrodes 4 (FIG.3(b)).
Then, after the first silicon oxide film 3 is removed by using the first conductive electrodes 4 as mask, a second silicon oxide film 6 with a thickness of 100 nm is formed on the surface of the n-type silicon region 2 and the surface of the first conductive electrodes 4 by the CVD process (FIG.3(c)).
Subsequently, p-type impurities, such as boron, is implanted into the n-type silicon region 2 through the second silicon oxide film 6 using the first conductive electrodes 4 as a mask to form n.sup.-- type silicon regions 7 with impurity concentration of 8.times.10.sup.16 cm.sup.3 and self-aligning with the first conductive electrodes 4 and the second silicon oxide film 6 on its side wall (FIG.3(d)).
Then, after a polycrystalline layer with a thickness of 300 nm is formed on an entire surface of the second silicon oxide film 6 by the LPCVD process, and patterned to form a second conductive electrodes 8 (FIG.3(e)). Then, an inter-layer dielectric film 9 is formed (FIG.3(f)).
Thereafter, metal wiring are formed on the inter-layer dielectric film 9 supplying the first conductive electrodes 4 and the second conductive electrodes 8 with a two-phase clock signal (FIG.3(g)). Then, a conventional two-phase driven two-layer electrode charge coupled device is obtained.
According to the conventional two-phase driven two-layer electrode charge coupled device, each of the n-type silicon regions 2 has the same impurity concentration (1.times.10.sup.17 cm.sup.3) between just below the first charge transfer electrodes 4 and in the gap between the first charge transfer electrodes 4 and the second charge transfer electrodes 8, i.e., just below the second silicon oxide film 6 formed on the side wall of the first charge transfer electrodes 4. This is because the n-type silicon regions 2 is covered with the first charge transfer electrodes 4 and the second silicon oxide film 6 on the side wall of the first charge transfer electrodes 4 during the ion implantation to form the n-type silicon regions 7.
Here, the thickness of the silicon oxide film below each electrode is considered to estimate electric potential in transferring charges. It is 100 nm (thickness of the first silicon oxide film 3) just below the first charge transfer electrodes 4. It is also 100 nm (thickness of the second silicon oxide film 6) just below the recess of the second charge transfer electrodes 8. On the other hand, the silicon film is substantially very thick in the gap between the first charge transfer electrode 4 and the second charge transfer electrodes 9, i.e., on the side wall of the first charge transfer electrodes 4. In the example described above, the thickness of the silicon oxide film on the side wall of the first charge transfer electrode 4 is substantially equal to sum of the first silicon oxide film 3 (100 nm), the first charge transfer electrodes 4 (300 nm), and the second silicon oxide film 6 (100 nm). Consequently, when it is intended to transfer signal charges at a low drive voltage of, for example, 3V, a problem that the electrical potential is depressed at the gap between both the electrodes arises, thereby the transfer efficiency being deteriorated. The effect of the it will be described as followings.
FIG.4(b) is diagram of an electrical potential to explain the deterioration of the transfer efficiency occurring when the drive voltage is lowered in the conventional charge coupled device of the two-layer electrode two-phase driven system the sectional view of which is shown in FIG.4(a). According to FIG.4(b) a broken line shows the electrical potential when the drive voltage is relatively high voltage, for example, at 5V, while a solid lines shows the electrical potential when the drive voltage is relatively low voltage, for example, at 3V. When there is larger electric potential difference between the adjacent charge transfer electrodes, the depression of electrical potential generated from the gap between the first charge transfer electrodes 4 and the second charge transfer electrodes 8 is more modulated by a fringing electric field so that the depression of electrical potential is suppressed as shown by broken line in FIG.4(b). That is, as shown in FIG.4(b), if the driving voltage is sufficiently high for the charge transfer device, and there is sufficiently high electric potential difference .phi..sub.2 (.phi..sub.21, .phi..sub.22), there occurs no depression in the electric potential, so that signal charges are smoothly transferred.
On the other hand, if the potential difference becomes small between the first charge transfer electrodes 4 and the second charge transfer electrodes 8 which are adjacent, then the depression tends to occur in the electric potential, thereby defective transfer being caused. That is, as shown by the solid lines in FIG.4(b), if the driving voltage is relatively low for the charge coupled device, and there is a small electric potential difference .phi..sub.1 (.phi..sub.11, .phi..sub.12), become small the potential difference .phi..sub.11 between the first charge transfer electrodes 4 and the second charge transfer electrodes 8 to which different voltage is applied, and the potential difference .phi..sub.12 between the first charge transfer electrodes 4 and the second charge transfer electrodes 8 to which equal voltage is applied. Consequently, depressions of electric potential indicated by points A and B below the gap between the first charge transfer electrode 4 and the second charge transfer electrode 8 is occurred, because the fringing electric field is weak so that the electrical potential is not suppressed sufficiently.
When such depression occurs, not only the signal charge is trapped in the depression, but also the charge transfer field becomes weak near the depression of electric potential. Thus, the signal charge is dominantly transferred by thermal diffusion. As the result, the transfer time becomes very long, so that it becomes difficult to perform transfer at a high speed, and defective transfer tends to occur. From the above, it is found to transfer charges at a high speed even when the drive voltage for a charge transfer device is reduced that the charge transfer device is important to be constructed in such a manner that the depression in electric potential can be suppressed.